542 search results - page 4 / 109 » SystemJ: A GALS language for system level design |
FDL
2004
IEEE
13 years 11 months ago
2004
IEEE
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
FDL
2007
IEEE
14 years 1 months ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
FDL
2004
IEEE
13 years 11 months ago
2004
IEEE
In this work we develop a secure communication protocol in the context of a Remote Meter Reading (RMR) System. We first analyze existing standards in secure communication (e.g. IP...
DSD
2006
IEEE
14 years 1 months ago
2006
IEEE
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
EUROMICRO
1999
IEEE
13 years 11 months ago
1999
IEEE
Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial empha...