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AOSD
2009
ACM
14 years 5 months ago
Modelling hardware verification concerns specified in the e language: an experience report
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
Darren Galpin, Cormac Driver, Siobhán Clark...
INFOCOM
2009
IEEE
14 years 5 months ago
Keep Cache Replacement Simple in Peer-Assisted VoD Systems
—Peer-assisted Video-on-Demand (VoD) systems have not only received substantial recent research attention, but also been implemented and deployed with success in large-scale real...
Jiahua Wu, Baochun Li
ISPD
2006
ACM
90views Hardware» more  ISPD 2006»
14 years 4 months ago
Fast buffer insertion considering process variations
Advanced process technologies call for a proactive consideration of process variations in design to ensure high parametric timing yield. Despite of its popular use in almost any h...
Jinjun Xiong, Lei He
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
14 years 3 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
14 years 3 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick