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» Tamper-Tolerant Software: Modeling and Implementation
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MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
14 years 3 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
CC
2009
Springer
14 years 2 months ago
Scheduling Tasks to Maximize Usage of Aggregate Variables in Place
Single-assignment languages with copy semantics have a very simple and approachable programming model. A na¨ıve implementation of the copy semantics that copies the result of eve...
Samah Abu-Mahmeed, Cheryl McCosh, Zoran Budimlic, ...
DCC
2009
IEEE
14 years 10 months ago
Compressed Kernel Perceptrons
Kernel machines are a popular class of machine learning algorithms that achieve state of the art accuracies on many real-life classification problems. Kernel perceptrons are among...
Slobodan Vucetic, Vladimir Coric, Zhuang Wang
NDSS
2007
IEEE
14 years 4 months ago
RICH: Automatically Protecting Against Integer-Based Vulnerabilities
We present the design and implementation of RICH (Run-time Integer CHecking), a tool for efficiently detecting integer-based attacks against C programs at run time. C integer bug...
David Brumley, Dawn Xiaodong Song, Tzi-cker Chiueh...
EMSOFT
2007
Springer
14 years 4 months ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...