119 search results - page 21 / 24 » Targeting Tiled Architectures in Design Exploration |
HPCA
2002
IEEE
14 years 8 months ago
2002
IEEE
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...
WICON
2008
13 years 9 months ago
2008
In this paper, we discuss key management challenges for seamless handovers across heterogeneous wireless networks. We focus on utilizing existing keying material from previous acc...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
SIGGRAPH
1995
ACM
13 years 11 months ago
1995
ACM
Physically-based modeling has been used in the past to support a variety of interactive modeling tasks including free-form surface design, mechanism design, constrained drawing, a...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...