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» Task Selection for a Multiscalar Processor
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MICRO
1998
IEEE
98views Hardware» more  MICRO 1998»
13 years 11 months ago
Task Selection for a Multiscalar Processor
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
T. N. Vijaykumar, Gurindar S. Sohi
LCPC
1999
Springer
13 years 11 months ago
Compiling for Speculative Architectures
The traditional target machine of a parallelizing compiler can execute code sections either serially or in parallel. In contrast, targeting the generated code to a speculative para...
Seon Wook Kim, Rudolf Eigenmann
ICCAD
2003
IEEE
188views Hardware» more  ICCAD 2003»
14 years 4 months ago
Communication-Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization
Abstract: In this paper, we present an interprocessor communication-aware task scheduling algorithm applicable to a multiprocessor system executing an application with dependent ta...
Girish Varatkar, Radu Marculescu
EMSOFT
2010
Springer
13 years 5 months ago
Optimal WCET-aware code selection for scratchpad memory
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
Hui Wu, Jingling Xue, Sridevan Parameswaran
JSA
2006
88views more  JSA 2006»
13 years 7 months ago
Scheduling tasks sharing files on heterogeneous master-slave platforms
This paper is devoted to scheduling a large collection of independent tasks onto heterogeneous clusters. The tasks depend upon (input) files which initially reside on a master pro...
Arnaud Giersch, Yves Robert, Frédéri...