3340 search results - page 158 / 668 » Teaching networking hardware |
129
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DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
The amount of electronic systems introduced in vehicles is continuously increasing: X-by-wire, complex electronic control systems and above all future applications such as automot...
135
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
138
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SBACPAD
2007
IEEE
15 years 10 months ago
2007
IEEE
Adoption of the 10GbE Ethernet standard has been impeded by two important performance-oriented considerations: 1) processing requirements of common protocol stacks and 2) end-to-e...
136
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FPL
2006
Springer
15 years 8 months ago
2006
Springer
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
140
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DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...