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ICCD
2003
IEEE
111views Hardware» more  ICCD 2003»
16 years 1 months ago
Routed Inter-ALU Networks for ILP Scalability and Performance
Modern processors rely heavily on broadcast networks to bypass instruction results to dependent instructions in the pipeline. However, as clock rates increase, architectures get w...
Karthikeyan Sankaralingam, Vincent Ajay Singh, Ste...
ICCAD
2001
IEEE
272views Hardware» more  ICCAD 2001»
16 years 1 months ago
NetBench: A Benchmarking Suite for Network Processors
— In this study we introduce NetBench, a benchmarking suite for network processors. NetBench contains a total of 9 applications that are representative of commercial applications...
Gokhan Memik, William H. Mangione-Smith, Wendong H...
144
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ISCA
2009
IEEE
192views Hardware» more  ISCA 2009»
15 years 11 months ago
A case for bufferless routing in on-chip networks
Buffers in on-chip networks consume significant energy, occupy chip area, and increase design complexity. In this paper, we make a case for a new approach to designing on-chip in...
Thomas Moscibroda, Onur Mutlu
ISCA
2009
IEEE
214views Hardware» more  ISCA 2009»
15 years 11 months ago
Phastlane: a rapid transit optical routing network
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...
Mark J. Cianchetti, Joseph C. Kerekes, David H. Al...
SIGMETRICS
2010
ACM
223views Hardware» more  SIGMETRICS 2010»
15 years 9 months ago
Self-synchronizing properties of CSMA wireless multi-hop networks
We show that CSMA is able to spontaneously synchronize transmissions in a wireless network with constant-size packets, and that this property can be used to devise efficient synch...
Kuang Xu, Olivier Dousse, Patrick Thiran