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» Techniques and tools for dynamic optimization
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VLSID
2002
IEEE
122views VLSI» more  VLSID 2002»
14 years 8 months ago
Evaluating Run-Time Techniques for Leakage Power Reduction
While some leakage power reduction techniques require modification of process technology achieving savings at the fabrication stage, others are based on circuit-level optimization...
David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishn...
IDMS
2000
Springer
128views Multimedia» more  IDMS 2000»
13 years 11 months ago
Fast and Optimal Multicast-Server Selection Based on Receivers' Preference
Abstract. In this paper, we propose static and dynamic server selection techniques for multicast receivers who receive multiple streams from replicated servers. In the proposed sta...
Akihito Hiromori, Hirozumi Yamaguchi, Keiichi Yasu...
GLVLSI
2009
IEEE
164views VLSI» more  GLVLSI 2009»
14 years 2 months ago
Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Da...
EXPCS
2007
14 years 1 days ago
Analysis of input-dependent program behavior using active profiling
Utility programs, which perform similar and largely independent operations on a sequence of inputs, include such common applications as compilers, interpreters, and document parse...
Xipeng Shen, Michael L. Scott, Chengliang Zhang, S...
IH
2001
Springer
14 years 18 days ago
Computational Forensic Techniques for Intellectual Property Protection
Computational forensic engineering (CFE) aims to identify the entity that created a particular intellectual property (IP). Rather than relying on watermarking content or designs, t...
Jennifer L. Wong, Darko Kirovski, Miodrag Potkonja...