684 search results - page 65 / 137 » Techniques for Accelerating a Grammar-Checker |
ATVA
2005
Springer
14 years 3 months ago
2005
Springer
Abstract. This paper argues that flatness appears as a central notion in the verification of counter automata. A counter automaton is called flat when its control graph can be ...
VMCAI
2005
Springer
14 years 3 months ago
2005
Springer
Bounded model checking (BMC) is an automatic verification method that is based on a finite unfolding of the system’s transition relation. BMC has been successfully applied, in ...
PPPJ
2004
ACM
14 years 3 months ago
2004
ACM
A new acceleration technology for Java embedded virtual machines is presented in this paper. Based on the selective dynamic compilation technique, this technology addresses the J2...
FPGA
2003
ACM
14 years 3 months ago
2003
ACM
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
ISWC
2002
IEEE
14 years 2 months ago
2002
IEEE
Wearable, camera based, head–tracking systems use spatial image registration algorithms to align images taken as the wearer gazes around their environment. This allows for compu...