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» Techniques for Region-Based Register Allocation
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MICRO
2000
IEEE
98views Hardware» more  MICRO 2000»
13 years 12 months ago
The store-load address table and speculative register promotion
Register promotion is an optimization that allocates a value to a register for a region of its lifetime where it is provably not aliased. Conventional compiler analysis cannot alw...
Matt Postiff, David Greene, Trevor N. Mudge
PLDI
2003
ACM
14 years 22 days ago
Taming the IXP network processor
We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal b...
Lal George, Matthias Blume
EUROMICRO
1999
IEEE
13 years 11 months ago
Delft-Java Dynamic Translation
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
C. John Glossner, Stamatis Vassiliadis
CC
2009
Springer
153views System Software» more  CC 2009»
14 years 8 months ago
Register Spilling and Live-Range Splitting for SSA-Form Programs
Register allocation decides which parts of a variable's live range are held in registers and which in memory. The compiler inserts spill code to move the values of variables b...
Matthias Braun, Sebastian Hack
ICS
2007
Tsinghua U.
14 years 1 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev