66 search results - page 13 / 14 » Techniques for extracting instruction level parallelism on M... |
ISHPC
2000
Springer
13 years 10 months ago
2000
Springer
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
CGO
2003
IEEE
14 years 2 hour ago
2003
IEEE
Predicated execution can eliminate hard to predict branches and help to enable instruction level parallelism. Many current predication variants exist where the result update is co...
DATE
2006
IEEE
14 years 23 days ago
2006
IEEE
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...
DATE
2005
IEEE
14 years 9 days ago
2005
IEEE
— Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in “trusted” software t...
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...