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» Technology mapping for k m-macrocell based FPGAs
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FPL
2006
Springer
113views Hardware» more  FPL 2006»
13 years 11 months ago
A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...
Alastair M. Smith, George A. Constantinides, Peter...
WWW
2011
ACM
13 years 3 months ago
Truthy: mapping the spread of astroturf in microblog streams
Online social media are complementing and in some cases replacing person-to-person social interaction and redefining the diffusion of information. In particular, microblogs have ...
Jacob Ratkiewicz, Michael Conover, Mark Meiss, Bru...
IMC
2009
ACM
14 years 2 months ago
IXPs: mapped?
Internet exchange points (IXPs) are an important ingredient of the Internet AS-level ecosystem—a logical fabric of the Internet made up of about 30,000 ASes and their mutual bus...
Brice Augustin, Balachander Krishnamurthy, Walter ...
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 5 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
DAC
2004
ACM
14 years 9 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan