179 search results - page 14 / 36 » Temperature-aware global placement |
SPDP
1991
IEEE
13 years 12 months ago
1991
IEEE
A number of experiments regarding the placement of instructions, private data and shared data in the Non-Uniform-Memory-Access multiprocessor, RP3 has been performed. Three Scient...
EURODAC
1995
IEEE
13 years 12 months ago
1995
IEEE
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
DATE
2000
IEEE
14 years 26 days ago
2000
IEEE
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
ASPLOS
1998
ACM
14 years 20 days ago
1998
ACM
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
ISMM
2011
Springer
12 years 11 months ago
2011
Springer
Abstract. Surface reconstruction from a set of noisy point measurements has been a well studied problem for several decades. Recently, variational and discrete optimization approac...