2 search results - page 1 / 1 » Temporal floorplanning using 3D-subTCG |
ICCAD
2004
IEEE
14 years 8 months ago
2004
IEEE
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
ASPDAC
2004
ACM
14 years 4 months ago
2004
ACM
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we use a novel topo...