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» Temporofunctional crosstalk noise analysis
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IOLTS
2003
IEEE
133views Hardware» more  IOLTS 2003»
14 years 1 months ago
Power Consumption of Fault Tolerant Codes: the Active Elements
On-chip global interconnections in very deep submicron technology (VDSM) ICs are becoming more sensitive and prone to errors caused by power supply noise, crosstalk noise, delay v...
Daniele Rossi, Steven V. E. S. van Dijk, Richard P...
DAC
1999
ACM
14 years 25 days ago
On-Chip Inductance Issues in Multiconductor Systems
As the family of Alpha microprocessors continues to scale into more advanced technologies with very high frequency edge rates and multiple layers of interconnect, the issue of cha...
Shannon V. Morton
ICCAD
2003
IEEE
139views Hardware» more  ICCAD 2003»
14 years 5 months ago
Equivalent Waveform Propagation for Static Timing Analysis
This paper proposes a scheme that captures diverse input waveforms of CMOS gates for static timing analysis. Conventionally the latest arrival time and transition time are calcula...
Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
14 years 5 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...
EURODAC
1994
IEEE
211views VHDL» more  EURODAC 1994»
14 years 19 days ago
Advanced simulation and modeling techniques for hardware quality verification of digital systems
synchronisation also play a fundamental role in overall system robustness. ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Interference (EMI) issues also have to be conside...
S. Forno, Stephen Rochel