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PPL
2008
185views more  PPL 2008»
13 years 8 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
13 years 13 hour ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
BIOINFORMATICS
2011
13 years 8 hour ago
A method for probing the mutational landscape of amyloid structure
Motivation: Proteins of all kinds can self-assemble into highly ordered β-sheet aggregates known as amyloid fibrils, important both biologically and clinically. However, the spe...
Charles W. O'Donnell, Jérôme Waldisp&...
ECCV
2008
Springer
14 years 10 months ago
Anisotropic Geodesics for Perceptual Grouping and Domain Meshing
This paper shows how computational Riemannian manifold can be used to solve several problems in computer vision and graphics. Indeed, Voronoi segmentations and Delaunay graphs comp...
Sébastien Bougleux, Gabriel Peyré, L...
GTTSE
2007
Springer
14 years 2 months ago
Model Transformations for the Compilation of Multi-processor Systems-on-Chip
With the increase of amount of transistors which can be contained on a chip and the constant expectation for more sophisticated applications, the design of Systems-on-Chip (SoC) is...
Éric Piel, Philippe Marquet, Jean-Luc Dekey...