203 search results - page 18 / 41 » Test Generation and Fault Localization for Quantum Circuits |
EVOW
2001
Springer
13 years 12 months ago
2001
Springer
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
ATS
2000
IEEE
13 years 12 months ago
2000
IEEE
Because domino logic design offers smaller area and faster delay than conventional CMOS design, it is very popular in the high-performance processor design. However, domino logic ...
CONSTRAINTS
2007
13 years 7 months ago
2007
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
GLVLSI
2002
IEEE
14 years 13 days ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
TASE
2009
IEEE
14 years 2 months ago
2009
IEEE
The complex interactions appearing in service-oriented computing make coordination a key concern in serviceoriented systems. In this paper, we present a fault-based method to gene...