1016 search results - page 114 / 204 » Test Generation for Designs with On-Chip Clock Generators |
IWIA
2006
IEEE
14 years 3 months ago
2006
IEEE
The recent outbreaks of extremely fast spreading worms highlight the inadequacy of the current patching approach. Intrusion prevention systems (IPSs) that automatically generate a...
DATE
2006
IEEE
14 years 24 days ago
2006
IEEE
Network applications are becoming increasingly popular in the embedded systems domain requiring high performance, which leads to high energy consumption. In networks is observed t...
SBCCI
2003
ACM
14 years 2 months ago
2003
ACM
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
ICCAD
2007
IEEE
14 years 29 days ago
2007
IEEE
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
CORR
2008
Springer
13 years 9 months ago
2008
Springer
This paper presents an analysis and system-level design of a capacitive harvester of vibration energy composed from a mechanical resonator, capacitive transducer and a conditioning...