1016 search results - page 128 / 204 » Test Generation for Designs with On-Chip Clock Generators |
126
Voted
DAC
1995
ACM
15 years 7 months ago
1995
ACM
Abstract A new method for power estimation in sequential circuits is presented that is based on a statistical estimation technique. By applying randomly generated input sequences t...
123
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CEC
2010
IEEE
15 years 5 months ago
2010
IEEE
Abstract-- A novel algorithm to solve constrained realparameter optimization problems, based on the Artificial Bee Colony algorithm is introduced in this paper. The operators used ...
161
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TSE
1998
15 years 3 months ago
1998
—The main goal of this work is to propose a method to evaluate user interfaces using task models and logs generated from a user test of an application. The method can be incorpor...
232
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EC
2011
14 years 11 months ago
2011
Whereas the current practice of designing antennas by hand is severely limited because it is both time and labor intensive and requires a significant amount of domain knowledge, ...
155
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FPGA
2005
ACM
15 years 9 months ago
2005
ACM
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...