1016 search results - page 15 / 204 » Test Generation for Designs with On-Chip Clock Generators |
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper presents 3LSSD, a novel, easilyautomatable approach for scan insertion and ATPG of asynchronous circuits. 3LSSD inserts scan latches only into global circuit feedback p...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
TCAD
2002
13 years 7 months ago
2002
A test pattern generator (TPG) for built-in self-test (BIST), which can reduce switching activity during test application, is proposed. The proposed TPG, called dual-speed LFSR (DS...
SERP
2007
13 years 9 months ago
2007
- Functional testing of software dedicated for hybrid embedded systems should start at the early development phase and requires analysis of discrete and continuous signals, where t...
CODES
2000
IEEE
14 years 1 days ago
2000
IEEE
In current design practice synthesis tools play a key role, letting designers to concentrate on the specificationof the system being designed by carrying out repetitive tasks such...