1016 search results - page 17 / 204 » Test Generation for Designs with On-Chip Clock Generators |
DATE
2000
IEEE
14 years 1 days ago
2000
IEEE
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
ATS
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we present test generation procedures to improve scan chain failure diagnosis. The proposed test generation procedures improve diagnostic resolution by using multi-...
DSD
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be used in combination with the column-matching based built-in self-test design meth...
GLVLSI
2002
IEEE
14 years 17 days ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...