1016 search results - page 33 / 204 » Test Generation for Designs with On-Chip Clock Generators |
CP
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. This paper considers the automatic generation of architectural tests (ATGP), a fundamental problem in processor validation. ATGPs are complex conditional constraint satis...
KBSE
2007
IEEE
14 years 1 months ago
2007
IEEE
We explore the automatic generation of test data that respect constraints expressed in the Object-Role Modeling (ORM) language. ORM is a popular conceptual modeling language, prim...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
This paper introduces a Built-In Self Test (BIST) structure referred to as Universal BIST (UBIST). The Test Pattern Generator (TPG) of the proposed UBIST is designed to generate an...
FPL
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. The paper presents a high performance True Random Number Generator (TRNG) embedded in Altera Stratix Field Programmable Logic Devices (FPLDs). As a source of randomness, ...
TVLSI
2008
13 years 7 months ago
2008
We present a selective encoding method that reduces test data volume and test application time for scan testing of Intellectual Property (IP) cores. This method encodes the slices ...