1016 search results - page 39 / 204 » Test Generation for Designs with On-Chip Clock Generators |
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Although scan-based designs are widely used in order to reduce the complexity of test generation, test application time and test data volume are substantially increased. We propos...
SCESM
2006
ACM
14 years 1 months ago
2006
ACM
The dynamic behavior of systems is best described by Finite-state machines. Generation of executable tests from behavioral models such as UML Statecharts offers benefits such as s...
WSC
1998
13 years 9 months ago
1998
Causality constraints of random discrete simulation make parallel and distributed processing difficult. Methods of applying reconfigurable logic to implement and accelerate simula...
COMPSAC
1999
IEEE
14 years 6 hour ago
1999
IEEE
Design patterns have been used in object-oriented frameworks such as the IBM San Francisco framework, Apple's Rhaspody, OpenStep, and WebObjects, and DIWB. However, few guide...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurement...