1016 search results - page 65 / 204 » Test Generation for Designs with On-Chip Clock Generators |
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
ICCAD
2000
IEEE
14 years 5 days ago
2000
IEEE
computation and automatic abstraction. Second, Ketchum performs not only automatic test generation but also unreachability analysis, which enables the test generation effort to be ...
ISSE
2010
13 years 6 months ago
2010
The Use Case, Responsibility Driven Analysis and Design (URDAD) methodology is a methodology for technology neutral design generating the Platform Independent Model of the Object M...
CSFW
2002
IEEE
14 years 22 days ago
2002
IEEE
We describe a protocol design process, and illustrate its use by creating ATSPECT, an Authentication Test-based Secure Protocol for Electronic Commerce Transactions. The design pr...
EMSOFT
2009
Springer
14 years 2 months ago
2009
Springer
An important step in model-based embedded system design consists in mapping functional specifications and their tasks/operations onto execution architectures and their ressources...