1016 search results - page 86 / 204 » Test Generation for Designs with On-Chip Clock Generators |
SEW
2007
IEEE
14 years 3 months ago
2007
IEEE
: After over a decade of use, design patterns continue to find new areas of application. In previous work, we presented a contract formalism for specifying patterns precisely, and...
CHI
2010
ACM
14 years 2 months ago
2010
ACM
Paper prototyping offers unique affordances for interface design. However, due to its spontaneous nature and the limitations of paper, it is difficult to distill and communicate a...
DATE
1999
IEEE
14 years 1 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
EMSOFT
2005
Springer
14 years 2 months ago
2005
Springer
Interrupt-driven embedded software is hard to thoroughly test since it usually contains a very large number of executable paths. Developers can test more of these paths using rand...
CONCURRENCY
2007
13 years 9 months ago
2007
Runtime verification of multithreaded systems, that is, the process of finding errors in multithreaded systems as they execute, is the theme of this paper. The major goal of the...