1016 search results - page 89 / 204 » Test Generation for Designs with On-Chip Clock Generators |
RSP
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
PPL
2008
13 years 9 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
ISCA
1997
IEEE
14 years 1 months ago
1997
IEEE
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
TVLSI
2008
13 years 8 months ago
2008
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
NORDICHI
2006
ACM
14 years 3 months ago
2006
ACM
Our aim is to introduce techniques that allow for active involvement of users throughout the design process, starting with the very early stages of ideation and exploration. The a...