The size and complexity of systems based on multiple processing units demand techniques for the automatic diagnosis of their state. System-level diagnosis consists in determining ...
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
Failures in plan execution can be attributed to errors in the execution of plan steps or violations of the plan structure. The structure of a plan prescribes which actions have to...
Cees Witteveen, Nico Roos, Adriaan ter Mors, Xiaoy...
We optimize the full-response diagnostic fault dictionary from a given test set. The smallest set of vectors is selected without loss of diagnostic resolution of the given test se...
: This paper presents efficient methods for online fault detection and diagnosis of Network-on-Chip (NoC) switches. The fault model considered in this research is a system level fa...