61 search results - page 8 / 13 » Test Pattern Generation Under Low Power Constraints |
SDM
2004
SIAM
13 years 9 months ago
2004
SIAM
Previous study has shown that mining frequent patterns with length-decreasing support constraint is very helpful in removing some uninteresting patterns based on the observation t...
NECO
2008
13 years 7 months ago
2008
ns. We have previously developed an abstract dynamical system for networks of spiking neurons that has allowed us to identify the criterion for the stationary dynamics of a network...
ICST
2010
IEEE
13 years 6 months ago
2010
IEEE
—In this case study we test a landing gear control system of a military aircraft with the new version of LUTESS, a tool for testing automatically synchronous software. LUTESS req...
ITC
2002
IEEE
14 years 16 days ago
2002
IEEE
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
DFT
2003
IEEE
14 years 27 days ago
2003
IEEE
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...