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» Test Resource Partitioning and Optimization for SOC Designs
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ISPAN
1997
IEEE
14 years 24 days ago
A Parallel Pipelined Renderer for Time-Varying Volume Data
This paper presents a strategy for efficiently rendering time-varying volume data on a distributed-memory parallel computer. Visualizing time-varying volume data take both large s...
Tzi-cker Chiueh, Kwan-Liu Ma
ASPDAC
2006
ACM
122views Hardware» more  ASPDAC 2006»
14 years 2 months ago
IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults
– We propose an interconnect diagnosis scheme based on Oscillation Ring test methodology for SOC design with heterogeneous cores. The target fault models are delay faults and cro...
Katherine Shu-Min Li, Yao-Wen Chang, Chauchin Su, ...
RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
14 years 2 months ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...
CORR
2011
Springer
149views Education» more  CORR 2011»
13 years 3 months ago
Load-Balancing Spatially Located Computations using Rectangular Partitions
Distributing spatially located heterogeneous workloads is an important problem in parallel scientific computing. We investigate the problem of partitioning such workloads (repres...
Erik Saule, Erdeniz Ö. Bas, Ümit V. &Cce...
ASPDAC
2000
ACM
109views Hardware» more  ASPDAC 2000»
14 years 6 days ago
A technique for QoS-based system partitioning
Quality of service (QoS) has been an important topic of many research communities. Combined with an advanced and retargetable compiler, variability of applicationsspecific very lar...
Johnson S. Kin, Chunho Lee, William H. Mangione-Sm...