142 search results - page 10 / 29 » Test architecture design and optimization for three-dimensio... |
DAC
2012
ACM
11 years 11 months ago
2012
ACM
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
IPPS
2003
IEEE
14 years 1 months ago
2003
IEEE
Modern applications for mobile computing require high performance architectures. On the other hand, there are restrictions such as storage or power consumption. The use of reconï¬...
MOBICOM
2006
ACM
14 years 2 months ago
2006
ACM
Wide area ocean networks for monitoring and scientific exploratory purposes are in various stages of design; smallscale networks are already in various stages of deployment and te...
ICCAD
2007
IEEE
14 years 13 days ago
2007
IEEE
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
CHES
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...