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» Test compaction for transition faults under transparent-scan
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ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Warning: Launch off Shift Tests for Delay Faults May Contribute to Test Escapes
- Two methods to apply tests to detect delay faults in standard scan designs are used. One is called launch off capture and the other is called launch off shift. Launch off shift t...
Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz
PTS
2007
102views Hardware» more  PTS 2007»
13 years 8 months ago
Testing and Model-Checking Techniques for Diagnosis
Black-box testing is a popular technique for assessing the quality of a system. However, in case of a test failure, only little information is available to identify the root-cause ...
Maxim Gromov, Tim A. C. Willemse
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
14 years 5 hour ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng
SERA
2007
Springer
14 years 1 months ago
A Formal Approach to Test the Robustness of Embedded Systems using Behaviour Analysis
Robustness is an important feature required for embedded systems. This paper presents a methodology to test robustness of such systems. We investigate system behaviour aspects. We...
Antoine Rollet, Fares Saad-Khorchef
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 7 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...