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EUSFLAT
2003
128views Fuzzy Logic» more  EUSFLAT 2003»
13 years 10 months ago
Hardware implementation of a fuzzy Petri net based on VLSI digital circuits
Industrial processes can be often modelled using Petri nets. If all the process variables (or events) are assumed to be twovalued signals, then it is possible to obtain a hardware...
Jacek Kluska, Zbigniew Hajduk
ASPDAC
2008
ACM
103views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Dynamic supply noise measurement circuit composed of standard cells suitable for in-site SoC power integrity verification
This paper presents an all digital measurement circuit called "gated oscillator" for capturing waveforms of dynamic power supply noise. The gated oscillator is constructe...
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoy...
DATE
2008
IEEE
122views Hardware» more  DATE 2008»
14 years 3 months ago
Digital bit stream jitter testing using jitter expansion
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurement...
Hyun Choi, Abhijit Chatterjee
ET
2010
113views more  ET 2010»
13 years 6 months ago
Calibration and Test Time Reduction Techniques for Digitally-Calibrated Designs: an ADC Case Study
Modern mixed-signal/RF circuits with a digital calibration capability could achieve significant performance improvement through calibration. However, the calibration process often ...
Hsiu-Ming Chang, Kuan-Yu Lin, Kwang-Ting (Tim) Che...
DSD
2005
IEEE
75views Hardware» more  DSD 2005»
14 years 2 months ago
An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform
We describe a new e-learning environment and a runtime platform for educational tools on digital system testing and design for testability. This environment is being developed in ...
Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogub...