244 search results - page 21 / 49 » Testing Digital Circuits with Constraints |
VLSID
2007
IEEE
14 years 10 months ago
2007
IEEE
As technology scales to 40nm and beyond, intra-die process variability will cause large delay and leakage variations across a chip in addition to expected die-to-die variations. I...
IMCSIT
2010
13 years 7 months ago
2010
Abstract--The paper proposes a model which allows integration of services published by independent providers into scientific or business workflows. Optimization algorithms are prop...
3DPVT
2004
IEEE
14 years 1 months ago
2004
IEEE
This paper develops a digital watermarking methodology for 3-D graphical objects defined by polygonal meshes. In watermarking or fingerprinting the aim is to embed a code in a giv...
ERSA
2010
13 years 7 months ago
2010
In this paper, we introduce the open-source PivPav backend tool for reconfigurable computing. Essentially, PivPav provides an interface to a library of digital circuits that are ke...
TCAD
2008
13 years 9 months ago
2008
Abstract--A key design constraint of circuits used in handheld devices is the power consumption, mainly due to battery life limitations. Adaptive power management (APM) techniques ...