Sciweavers

244 search results - page 41 / 49
» Testing Digital Circuits with Constraints
Sort
View
CCS
2006
ACM
14 years 10 days ago
EXE: automatically generating inputs of death
This paper presents EXE, an effective bug-finding tool that automatically generates inputs that crash real code. Instead of running code on manually or randomly constructed input,...
Cristian Cadar, Vijay Ganesh, Peter M. Pawlowski, ...
ISCA
2009
IEEE
137views Hardware» more  ISCA 2009»
14 years 3 months ago
A case for an interleaving constrained shared-memory multi-processor
Shared-memory multi-threaded programming is inherently more difficult than single-threaded programming. The main source of complexity is that, the threads of an application can in...
Jie Yu, Satish Narayanasamy
TCAD
2008
172views more  TCAD 2008»
13 years 8 months ago
General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
Foad Dabiri, Ani Nahapetian, Tammara Massey, Miodr...
EMSOFT
2009
Springer
14 years 3 months ago
Cache-aware scheduling and analysis for multicores
The major obstacle to use multicores for real-time applications is that we may not predict and provide any guarantee on real-time properties of embedded software on such platforms...
Nan Guan, Martin Stigge, Wang Yi, Ge Yu
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
14 years 3 months ago
Automated Testability Enhancements for Logic Brick Libraries
Circuit fabrics composed of highly regular structures, called logic bricks, have been described recently for improving yield. An automated logic brick design flow based on a SAT ...
Jason G. Brown, Brian Taylor, Ronald D. Blanton, L...