Sciweavers

1554 search results - page 66 / 311
» Testing Polymorphic Behavior
Sort
View
FMCAD
2007
Springer
14 years 2 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
ETS
2011
IEEE
212views Hardware» more  ETS 2011»
12 years 8 months ago
Structural Test for Graceful Degradation of NoC Switches
Abstract—Networks-on-Chip (NoCs) are implicitly fault tolerant due to their inherent redundancy. They can overcome defective cores, links and switches. As a side effect, yield is...
Atefe Dalirsani, Stefan Holst, Melanie Elm, Hans-J...
ITC
1999
IEEE
103views Hardware» more  ITC 1999»
14 years 14 days ago
Resistive bridge fault modeling, simulation and test generation
Resistive bridging faults in combinational CMOS circuits are studied in this work. Circuit-level models are ed to voltage behavior for use in voltage-level fault simulation and te...
Vijay R. Sar-Dessai, D. M. H. Walker
ASWEC
2010
IEEE
13 years 8 months ago
Scenario-Based Validation: Beyond the User Requirements Notation
—A quality-driven approach to software development and testing demands that, ultimately, the requirements of stakeholders be validated against the actual behavior of an implement...
Dave Arnold, Jean-Pierre Corriveau, Wei Shi
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
14 years 2 months ago
A two-tone test method for continuous-time adaptive equalizers
This paper describes a novel test method for continuous-time adaptive equalizers. This technique applies a two-sinusoidal-tone signal as stimulus and includes an RMS detector for ...
Dongwoo Hong, Shadi Saberi, Kwang-Ting Cheng, C. P...