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ICSE
2009
IEEE-ACM
14 years 2 months ago
WISE: Automated test generation for worst-case complexity
Program analysis and automated test generation have primarily been used to find correctness bugs. We present complexity testing, a novel automated test generation technique to ...
Jacob Burnim, Sudeep Juvekar, Koushik Sen
HICSS
2008
IEEE
163views Biometrics» more  HICSS 2008»
14 years 2 months ago
Building a Test Suite for Web Application Scanners
This paper describes the design of a test suite for thorough evaluation of web application scanners. Web application scanners are automated, black-box testing tools that examine w...
Elizabeth Fong, Romain Gaucher, Vadim Okun, Paul E...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 2 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
VTS
2007
IEEE
95views Hardware» more  VTS 2007»
14 years 2 months ago
Delay Test Quality Evaluation Using Bounded Gate Delays
: Conventionally, path delay tests are derived in a delay-independent manner, which causes most faults to be robustly untestable. Many non-robust tests are found but, in practice, ...
Soumitra Bose, Vishwani D. Agrawal
SIGSOFT
2006
ACM
14 years 2 months ago
Simulation-based test adequacy criteria for distributed systems
Developers of distributed systems routinely construct discrete-event simulations to help understand and evaluate the behavior of inter-component protocols. Simulations are abstrac...
Matthew J. Rutherford, Antonio Carzaniga, Alexande...