507 search results - page 38 / 102 » Testing implementations of transactional memory |
111
click to vote
SIGSOFT
2005
ACM
16 years 3 months ago
2005
ACM
In unit testing, a program is decomposed into units which are collections of functions. A part of unit can be tested by generating inputs for a single entry function. The entry fu...
ASPDAC
2007
ACM
15 years 6 months ago
2007
ACM
Abstract-- A complementary ferroelectriccapacitor (CFC) logic-circuit style is proposed for a compact and standby-power-free content-addressable memory (CAM). Since the use of the ...
132
click to vote
CSREAESA
2009
15 years 3 months ago
2009
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
141
Voted
PARCO
2003
15 years 3 months ago
2003
Three different partial differential equation (PDE) solver kernels are analyzed in respect to cache memory performance on a simulated shared memory computer. The kernels implement...
102
click to vote
ASPLOS
2008
ACM
15 years 4 months ago
2008
ACM
Support for optimistic parallelism such as thread-level speculation (TLS) and transactional memory (TM) has been proposed to ease the task of parallelizing software to exploit the...