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» Testing implementations of transactional memory
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ASPLOS
2000
ACM
14 years 2 months ago
Architecture and design of AlphaServer GS320
This paper describes the architecture and implementation of the AlphaServer GS320, a cache-coherent non-uniform memory access multiprocessor developed at Compaq. The AlphaServer G...
Kourosh Gharachorloo, Madhu Sharma, Simon Steely, ...
DFT
2009
IEEE
178views VLSI» more  DFT 2009»
14 years 5 months ago
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
Bradley F. Dutton, Charles E. Stroud
CONIELECOMP
2011
IEEE
13 years 2 months ago
FPGA design and implementation for vertex extraction of polygonal shapes
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduce...
Jorge Martínez-Carballido, Jorge Guevara-Es...
SEMWEB
2005
Springer
14 years 3 months ago
BRAHMS: A WorkBench RDF Store and High Performance Memory System for Semantic Association Discovery
Discovery of semantic associations in Semantic Web ontologies is an important task in various analytical activities. Several query languages and storage systems have been designed ...
Maciej Janik, Krys Kochut
CIDR
2003
145views Algorithms» more  CIDR 2003»
13 years 11 months ago
Distributed Computing with BEA WebLogic Server
This paper surveys distributed computing techniques used in the implementation of BEA WebLogic Server. It discusses how application servers provide a distributed transactional inf...
Dean Jacobs