507 search results - page 72 / 102 » Testing implementations of transactional memory |
HPDC
2008
IEEE
14 years 2 months ago
2008
IEEE
Advances in virtualization technology have focused mainly on strengthening the isolation barrier between virtual machines (VMs) that are co-resident within a single physical machi...
ISLPED
2004
ACM
14 years 1 months ago
2004
ACM
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
BMCBI
2010
13 years 7 months ago
2010
Background: In recent years, the demand for computational power in computational biology has increased due to rapidly growing data sets from microarray and other high-throughput t...
VLSISP
2002
13 years 7 months ago
2002
Large-grain synchronous dataflow graphs or multi-rate graphs have the distinct feature that the nodes of the dataflow graph fire at different rates. Such multi-rate large-grain dat...
ADC
2008
Springer
14 years 2 months ago
2008
Springer
This article describes how to implement efficient memory resident path indexes for semi-structured data. Two techniques are introduced, and they are shown to be significantly fas...