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FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
14 years 2 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
CHES
2000
Springer
114views Cryptology» more  CHES 2000»
14 years 1 months ago
Efficient Generation of Prime Numbers
The generation of prime numbers underlies the use of most public-key schemes, essentially as a major primitive needed for the creation of key pairs or as a computation stage appear...
Marc Joye, Pascal Paillier, Serge Vaudenay
EMSOFT
2008
Springer
13 years 11 months ago
Volatiles are miscompiled, and what to do about it
C's volatile qualifier is intended to provide a reliable link between operations at the source-code level and operations at the memorysystem level. We tested thirteen product...
Eric Eide, John Regehr
CHES
2006
Springer
133views Cryptology» more  CHES 2006»
14 years 1 months ago
Fast Generation of Prime Numbers on Portable Devices: An Update
The generation of prime numbers underlies the use of most public-key cryptosystems, essentially as a primitive needed for the creation of RSA key pairs. Surprisingly enough, despit...
Marc Joye, Pascal Paillier
ISSRE
2006
IEEE
14 years 3 months ago
BPEL4WS Unit Testing: Test Case Generation Using a Concurrent Path Analysis Approach
BPEL is a language that could express complex concurrent behaviors. This paper presents a novel method of BPEL test case generation, which is based on concurrent path analysis. Th...
Jun Yan, Zhong Jie Li, Yuan Yuan, Wei Sun, Jian Zh...