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EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
14 years 1 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
ECCC
2007
86views more  ECCC 2007»
13 years 9 months ago
Testing Halfspaces
This paper addresses the problem of testing whether a Boolean-valued function f is a halfspace, i.e. a function of the form f(x) = sgn(w·x−θ). We consider halfspaces over the ...
Kevin Matulef, Ryan O'Donnell, Ronitt Rubinfeld, R...
CORR
2010
Springer
53views Education» more  CORR 2010»
13 years 9 months ago
Phase-Only Planar Antenna Array Synthesis with Fuzzy Genetic Algorithms
This paper describes a new method for the synthesis of planar antenna arrays using fuzzy genetic algorithms (FGAs) by optimizing phase excitation coefficients to best meet a desir...
Boufeldja Kadri, Miloud Boussahla, Fethi Tarik Ben...
CSDA
2007
108views more  CSDA 2007»
13 years 9 months ago
Diagnostics for functional regression via residual processes
We develop regression diagnostics for functional regression models which relate a functional response to predictor variables that can be multivariate vectors or random functions. ...
Jeng-Min Chiou, Hans-Georg Müller
VTS
2005
IEEE
96views Hardware» more  VTS 2005»
14 years 3 months ago
Pseudo-Functional Scan-based BIST for Delay Fault
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng