Pseudo-Functional Scan-based BIST for Delay Fault

This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing problem is evident from the non-trivial number of Structurally Testable while Functionally Untestable (ST-FU) faults. Such faults can be detected by some scan/BIST patterns but not by any functional pattern. The goal of this BIST scheme is to allow only functional-like patterns generated from the BIST Random Test Pattern Generator (RTPG) as tests. This is done by inserting a Monitor at the output of the RTPG, which indicates whether the current pattern violates some pre-extracted functional constraints. In case of violation, the pattern will be skipped. In our implementation, a SAT solver is used to analyze and extract a set of functional constraints from the functional logic. These functional constraints are then implemented in hardware as the Monitor. Even though the extracted functional constraints can not be...

• Type: Conference
• Year: 2005
• Where: VTS
• Authors: Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng
• Keywords: BIST Scheme, Functional Constraints, Over-testing Problem, VTS 2005