Sciweavers

386 search results - page 28 / 78
» The Block Cipher Rijndael
Sort
View
FPL
2003
Springer
164views Hardware» more  FPL 2003»
15 years 9 months ago
FPGA Implementations of the RC6 Block Cipher
RC6 is a symmetric-key algorithm which encrypts 128-bit plaintext blocks to 128-bit ciphertext blocks. The encryption process involves four operations: integer addition modulo 2w ,...
Jean-Luc Beuchat
ISCAS
2005
IEEE
153views Hardware» more  ISCAS 2005»
15 years 10 months ago
A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
Paris Kitsos, Michalis D. Galanis, Odysseas G. Kou...
IJNSEC
2010
144views more  IJNSEC 2010»
14 years 11 months ago
A Note On Self-Shrinking Lagged Fibonacci Generator
Lagged Fibonacci Generators (LFG) are used as a building block of key-streamgenerator in stream cipher cryptography. In this note we have used the self-shrinkingconcept in LFG and ...
Moon K. Chetry, W. B. Vasantha Kandaswamy
ISPEC
2011
Springer
14 years 7 months ago
Meet-in-the-Middle Attack on 8 Rounds of the AES Block Cipher under 192 Key Bits
The AES block cipher has a 128-bit block length and a user key of 128, 192 or 256 bits, released by NIST for data encryption in the USA; it became an ISO international standard in ...
Yongzhuang Wei, Jiqiang Lu, Yupu Hu
166
Voted
ISCAS
2008
IEEE
127views Hardware» more  ISCAS 2008»
15 years 11 months ago
Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection
— ICEBERG is a block cipher that has been recently proposed for security applications requiring efficient FPGA implementations. In this paper, we investigate a compact ASIC imple...
Huiju Cheng, Howard M. Heys