The Network Interdiction Problem involves interrupting an adversary's ability to maximize flow through a capacitated network by destroying portions of the network. A budget c...
Abstract. We describe fully polynomial time approximation schemes for generalized multicommodity flow problems arising in VLSI applications such as Global Routing via Buffer Block...
Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu,...
Process variations cause different behavior of timingdependent effects across different chips. In this work, we analyze one example of timing-dependent effects, crosscoupling ...
We propose a new VLSI layout methodology which addresses the main problems faced in Deep Sub-Micron (DSM) integrated circuit design. Our layout "fabric" scheme eliminate...
Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton,...
— New back-end design for manufacturability rules have brought guarantee rules for interconnect matching. These rules indicate a certain capacitance matching guarantee given spac...