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» The Case for Analog Circuit Verification
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ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
14 years 1 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
13 years 11 months ago
Smaller Two-Qubit Circuits for Quantum Communication and Computation
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to librar...
Vivek V. Shende, Igor L. Markov, Stephen S. Bulloc...
APSEC
2008
IEEE
13 years 9 months ago
A Verification Framework for FBD Based Software in Nuclear Power Plants
Formal verification of Function Block Diagram (FBD) based software is an essential task when replacing traditional relay-based analog system with PLC-based software in nuclear rea...
Junbeom Yoo, Sung Deok Cha, Eunkyoung Jee
IJNSEC
2008
190views more  IJNSEC 2008»
13 years 7 months ago
Probabilistic Analysis and Verification of the ASW Protocol using PRISM
The ASW protocol is one of the prominent optimistic fair exchange protocols that is used for contract signing between two participants, the originator and the responder, with the ...
Salekul Islam, Mohammad Abu Zaid
ISQED
2011
IEEE
240views Hardware» more  ISQED 2011»
12 years 10 months ago
Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling
—Design optimization methodologies for AMS-SoCs with analog, digital, and mixed-signal portions have not received significant attention, due to their high complexity. In mixed-s...
Oleg Garitselov, Saraju P. Mohanty, Elias Kougiano...