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» The Case for Analog Circuit Verification
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GLVLSI
1998
IEEE
124views VLSI» more  GLVLSI 1998»
13 years 11 months ago
Non-Refreshing Analog Neural Storage Tailored for On-Chip Learning
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
Bassem A. Alhalabi, Qutaibah M. Malluhi, Rafic A. ...
DAC
1990
ACM
13 years 11 months ago
Timing Verification Using HDTV
In this paper, we provide an overview of a system designed for verifying the consistency of timing specifications for digital circuits. The utility of the system comes from the ne...
Alan R. Martello, Steven P. Levitan, Donald M. Chi...
DAC
2009
ACM
14 years 8 months ago
The day Sherlock Holmes decided to do EDA
Semiconductor design companies are in a continuous search for design tools that address the ever increasing chip design complexity coupled with strict time-to-market schedules and...
Andreas G. Veneris, Sean Safarpour
BMAS
2000
IEEE
13 years 12 months ago
Modeling and Simulation of a Sigma-Delta Digital to Analog Converter Using VHDL-AMS
— Sigma-Delta digital to analog converters are less vulnerable to circuit imperfections than their A/D counterparts because they have their noise-shaping loop all in the digital ...
Martin Vogels, Bart De Smedt, Georges G. E. Gielen
ASIAN
2009
Springer
252views Algorithms» more  ASIAN 2009»
13 years 8 months ago
"Logic Wins!"
Abstract. Clever algorithm design is sometimes superseded by simple encodings into logic. We apply this motto to a few case studies in the formal verification of security propertie...
Jean Goubault-Larrecq