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» The Complexity of the A B C Problem
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ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
14 years 3 months ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
ADT
2011
13 years 13 days ago
Virtual networks: isolation, performance, and trends
Currently, there is a strong effort of the research community in rethinking the Internet architecture to cope with its current limitations and support new requirements. Many resea...
Natalia Castro Fernandes, Marcelo D. D. Moreira, I...
PODS
2008
ACM
128views Database» more  PODS 2008»
14 years 9 months ago
Shape sensitive geometric monitoring
A fundamental problem in distributed computation is the distributed evaluation of functions. The goal is to determine the value of a function over a set of distributed inputs, in ...
Izchak Sharfman, Assaf Schuster, Daniel Keren
ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
14 years 2 months ago
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
Li-Chung Hsu, Hung-Ming Chen
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
14 years 1 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo