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ICCAD
1999
IEEE
96views Hardware» more  ICCAD 1999»
15 years 7 months ago
Implication graph based domino logic synthesis
In this paper, we present a new approach to the problem of inverter elimination in domino logic synthesis. A small piece of static CMOS logic is introduced to the circuit to avoid...
Ki-Wook Kim, C. L. Liu, Sung-Mo Kang
ANSS
1997
IEEE
15 years 6 months ago
Performance Issues of Task Routing and Task Scheduling with Resequencing in Homogeneous Distributed Systems
An important part of a distributed system design is the workload sharing among the processors. This includes partitioningthe arriving jobs into tasks that can be executed in paral...
Anthony Karageorgos, Helen D. Karatza
99
Voted
HPDC
1997
IEEE
15 years 6 months ago
Optimizing Layered Communication Protocols
Layering of protocols o ers several well-known advantages, but typically leads to performance ine ciencies. We present a model for layering, and point out where the performance pr...
Mark Hayden, Robbert van Renesse
DAC
1996
ACM
15 years 6 months ago
Issues and Answers in CAD Tool Interoperability
CAD tool interoperability issues are a recurring impediment to constructing a design methodology, especially if the methodology incorporates point tools from several vendors. Failu...
Mike Murray, Uwe B. Meding, Bill Berg, Yatin Trive...
135
Voted
DAC
1996
ACM
15 years 6 months ago
Efficient Partial Enumeration for Timing Analysis of Asynchronous Systems
-- This paper presents an efficient method for the timing verification of concurrent systems, modeled as labeled Timed Petri nets. The verification problems we consider require us ...
Eric Verlind, Gjalt G. de Jong, Bill Lin