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C5
2004
IEEE
13 years 11 months ago
Design for an Extensible Croquet-Based Framework to Deliver a Persistent, Unified, Massively Multi-User, and Self-Organizing Vir
We describe a design for a collaborative Virtual Learning Environment (VLE) to support massively multi-user and multi-institutional learning communities. This architecture extends...
Mark P. McCahill, Julian Lombardi
IEEEPACT
2006
IEEE
14 years 1 months ago
Two-level mapping based cache index selection for packet forwarding engines
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. The efficiency of a cache for this application critically depends on the ...
Kaushik Rajan, Ramaswamy Govindarajan
HPCA
2006
IEEE
14 years 7 months ago
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads
With the continuing growth in the amount of genetic data, members of the bioinformatics community are developing a variety of data-mining applications to understand the data and d...
Aamer Jaleel, Matthew Mattina, Bruce L. Jacob
IPPS
2006
IEEE
14 years 1 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
ISVLSI
2007
IEEE
204views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Designing Memory Subsystems Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz