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» The Design and Implementation of a Certifying Compiler
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CC
2008
Springer
240views System Software» more  CC 2008»
13 years 9 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
ICWL
2007
Springer
14 years 1 months ago
Discovery of Educational Objective on E-Learning Resource: A Competency Approach
It is indeed important to implement e-Learning platforms for education and training purposes in a variety of domains. However, facing the enormous amount of learning resources, gui...
Shi-Ming Huang, Hsiang-Yuan Hsueh, Jing-Shiuan Hua
DELTA
2010
IEEE
14 years 19 days ago
Algorithm Transformation for FPGA Implementation
— High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
Donald G. Bailey, Christopher T. Johnston
CODES
1999
IEEE
13 years 12 months ago
A flexible code generation framework for the design of application specific programmable processors
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...
François Charot, Vincent Messé
DSD
2010
IEEE
162views Hardware» more  DSD 2010»
13 years 6 months ago
A Parallel for Loop Memory Template for a High Level Synthesis Compiler
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
Craig Moore, Wim Meeus, Harald Devos, Dirk Strooba...